The manufacturing of packaged integrated semiconductor devices occurs generally in two stages known as "front end" processing and "back end" processing. "Front end" processing deals with formation of various devices such as transistors, resistors, and capacitors on a semiconductor wafer. "Back end" processing deals with assembly and test wherein after formation of the various devices on the semiconductor wafer, the wafer is sliced into semiconductor dies, the dies are assembled into packages, and the packaged dies are tested. Although various packaging techniques exist, the two main techniques are plastic packaging and ceramic packaging.
Ceramic packaging is discussed on pages 455-522 of chapter 7 of Microelectronics Packaging Handbook by Rao R. Tummala and Eugene J. Rymaszewski, copyright 1989 and on pages 727-777 of chapter 10. Although different types of ceramic packages exist, most ceramic packages have a lid covering a semiconductor die (chip) mounted to a ceramic base. Prior art FIG. 1 shows a typical ceramic dual in line (CERDIP) packaged device 10. In FIG. 1, a semiconductor die 12 is mounted to a ceramic base 14 by a chip bond material 13. Semiconductor die 12 represents generically many types of semiconductor devices, such as, for example, dynamic random access memories (DRAMs), electrically erasable programmable read only memories (EEPROMs), and microprocessors. Three broad categories of chip die attach bond materials are solders, organic adhesives and glass. Exemplary of solders are Au--Si, Au--Sn, Pb--Ag--In, and Pb--Sn metallic compositions. Exemplary of organic adhesives are epoxies, polyimides (most frequently filled with silver) and thermoplastics such as acrylics, polyester or polyamides filled with metal. Exemplary of glasses are silver-filled glass materials as discussed in "A Critical Review of VLSI Die-Attachment in High Reliability Applications" by Shukla and Mancinger appearing in Solid State Technology, July 1985 page 67 et seq. The die attach material must be heated to bond the chip to the ceramic base 14.
Continuing with reference to prior art FIG. 1, packaged device 10 includes wire bonds 16 connecting semiconductor die 12 to a lead frame 18 that is adhered on ceramic base 14 by a seal material 20. Seal material 20 is typically a glass that must be heated to embed lead frame 18. A lid 22 is attached by a seal 24 and covers semiconductor die 12 to seal ceramic package 10. Lid 22 is typically alumina oxide. Seal 24 is typically a glass and must be heated to secure lid 22 to base 14.
Prior art FIG. 2 illustrates an assembly work cell 26 as may exist in a semiconductor manufacturing facility for packaging a ceramic device as illustrated in prior art FIG. 1. Work cell 26 includes a base and lead frame loader station 28. At station 28, ceramic base 14 is placed upon a cerdip metal tray holder, illustrated in prior art FIG. 3. Lead frame 18 is then placed on ceramic base 14. Cerdip tray 30 of FIG. 3 is made of stainless steel, is about 12 inches long, is about 3 inches wide, and holds 10 ceramic bases. At die bonder station 32, the die attach material 13 is placed onto base 14 and the die 12 is placed onto base 14. At furnace station 34, the die attach material and seal material are heated to firmly adhere die 12 to base 14 and to embed lead frame 18.
Furnace station 34 of prior art FIG. 2 unfortunately occupies a large amount of expensive manufacturing floor space; it is up to 30 feet long and about 4 feet wide. While multiple cerdip trays 30 travel through furnace 34 on a conveyor belt, it unfortunately takes about 1 hour for a tray 30 to pass through furnace 34. Furnace time needs to be reduced to reduce cycle time. Heat is typically provided by electricity passing through metal heater filaments or by gas flames that are disposed over the conveyor furnace belt. The furnace 34 unfortunately has a problem with particle contamination as it is a dirty process. As device geometries continue to shrink (for example, present 16 megabit dynamic random access memories and electrically programmable read only memories are manufactured using 0.5 micron design rules while 256 megabit dynamic random access memories are expected to utilize 0.25 micron design rules), particulates that were formerly acceptable become unacceptable because their size may approximate that of the design rules of the manufactured device. Carbon particulates from furnace 34 may cause about a 10% product loss. Another problem is incomplete lead frame embed; about 2 to 3 thousand packages per million are lost due to incomplete lead frame attach.
After die attach and lead frame embed in prior art FIG. 2, the ceramic bases 14 on cerdip trays 30 go to bonder stations 36 where wire bonds 18 are connected to semiconductor die 12 and to lead frame 18. Several bonding stations 18 are typically provided in a work cell. Next, trays 30 go to cap loader station 38. Here, lids 22 with seal material 24 thereon are placed onto bases 14. Thereafter, not shown in prior art FIG. 2, the devices are heated in a conveyor furnace similar to furnace 34 to seal the lids. Prior art FIG. 4, taken from page 752 of Microelectronics Packaging Handbook, shows a typical sealing/glazing profile for cerdip ceramic packages.
A proposed lid sealing apparatus and method by Bokil would replace a metal heater filament with a beam of focused infrared light to reduce heat transfer into the ceramic package. See U.S. Pat. No. 4,481,708 issued Nov. 13, 1984 and U.S. Pat. No. 4,685,200 issued Aug. 11, 1987, and, the article by D. E. Erickson "Hybrid Circuit Sealing-Problem Prevention Clinic", Electronic Packaging and Production, 22(11): pp. 133-137, November 1982. The Bokil system unfortunately appears relatively large and complicated due to the spacing design required to focus the infrared beams towards the glass for the lid seal and the required number of infrared beams (one on each side of the package).
It is thus an object of the invention to provide a new apparatus and method for lid seal on ceramic packages.
Further objects and benefits of the invention will be apparent to those of ordinary skill in the art having the benefit of the description and drawings following herein.